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ESP32-C6 Fixes Settings for RMT and UART source clock (#8340)
* Fixes RMT Source Clock setting * Fixes UART Source Clock setting
1 parent b6f64c7 commit d3165ba

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2 files changed

+3
-12
lines changed

2 files changed

+3
-12
lines changed

cores/esp32/esp32-hal-rmt.c

+2-8
Original file line numberDiff line numberDiff line change
@@ -478,11 +478,8 @@ bool rmtInit(int pin, rmt_ch_dir_t channel_direction, rmt_reserve_memsize_t mem_
478478
// TX Channel
479479
rmt_tx_channel_config_t tx_cfg;
480480
tx_cfg.gpio_num = pin;
481-
#if CONFIG_IDF_TARGET_ESP32C6
481+
// CLK_APB for ESP32|S2|S3|C3 -- CLK_PLL_F80M for C6 -- CLK_XTAL for H2
482482
tx_cfg.clk_src = RMT_CLK_SRC_DEFAULT;
483-
#else
484-
tx_cfg.clk_src = RMT_CLK_SRC_APB;
485-
#endif
486483
tx_cfg.resolution_hz = frequency_Hz;
487484
tx_cfg.mem_block_symbols = SOC_RMT_MEM_WORDS_PER_CHANNEL * mem_size;
488485
tx_cfg.trans_queue_depth = 10; // maximum allowed
@@ -507,11 +504,8 @@ bool rmtInit(int pin, rmt_ch_dir_t channel_direction, rmt_reserve_memsize_t mem_
507504
// RX Channel
508505
rmt_rx_channel_config_t rx_cfg;
509506
rx_cfg.gpio_num = pin;
510-
#if CONFIG_IDF_TARGET_ESP32C6
507+
// CLK_APB for ESP32|S2|S3|C3 -- CLK_PLL_F80M for C6 -- CLK_XTAL for H2
511508
rx_cfg.clk_src = RMT_CLK_SRC_DEFAULT;
512-
#else
513-
rx_cfg.clk_src = RMT_CLK_SRC_APB;
514-
#endif
515509
rx_cfg.resolution_hz = frequency_Hz;
516510
rx_cfg.mem_block_symbols = SOC_RMT_MEM_WORDS_PER_CHANNEL * mem_size;
517511
rx_cfg.flags.invert_in = 0;

cores/esp32/esp32-hal-uart.c

+1-4
Original file line numberDiff line numberDiff line change
@@ -192,11 +192,8 @@ uart_t* uartBegin(uint8_t uart_nr, uint32_t baudrate, uint32_t config, int8_t rx
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uart_config.flow_ctrl = UART_HW_FLOWCTRL_DISABLE;
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uart_config.rx_flow_ctrl_thresh = rxfifo_full_thrhd;
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uart_config.baud_rate = baudrate;
195-
#if CONFIG_IDF_TARGET_ESP32C6
195+
// CLK_APB for ESP32|S2|S3|C3 -- CLK_PLL_F40M for C2 -- CLK_PLL_F48M for H2 -- CLK_PLL_F80M for C6
196196
uart_config.source_clk = UART_SCLK_DEFAULT;
197-
#else
198-
uart_config.source_clk = UART_SCLK_APB;
199-
#endif
200197
ESP_ERROR_CHECK(uart_driver_install(uart_nr, rx_buffer_size, tx_buffer_size, 20, &(uart->uart_event_queue), 0));
201198
ESP_ERROR_CHECK(uart_param_config(uart_nr, &uart_config));
202199
ESP_ERROR_CHECK(uart_set_pin(uart_nr, txPin, rxPin, UART_PIN_NO_CHANGE, UART_PIN_NO_CHANGE));

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