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Enable PTPC FP8 for CompressedTensorsW8A8Fp8MoEMethod (triton fused_moe) #16537
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Enable PTPC FP8 for CompressedTensorsW8A8Fp8MoEMethod (triton fused_moe) #16537
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Signed-off-by: mgoin <mgoin64@gmail.com>
👋 Hi! Thank you for contributing to the vLLM project. 💬 Join our developer Slack at https://slack.vllm.ai to discuss your PR in #pr-reviews, coordinate on features in #feat- channels, or join special interest groups in #sig- channels. Just a reminder: PRs would not trigger full CI run by default. Instead, it would only run Once the PR is approved and ready to go, your PR reviewer(s) can run CI to test the changes comprehensively before merging. To run CI, PR reviewers can either: Add 🚀 |
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…oe) (vllm-project#16537) Signed-off-by: mgoin <mgoin64@gmail.com> Signed-off-by: Erdal Toprak <contact@erdaltoprak.com>
…oe) (vllm-project#16537) Signed-off-by: mgoin <mgoin64@gmail.com>
…oe) (vllm-project#16537) Signed-off-by: mgoin <mgoin64@gmail.com> Signed-off-by: Yang Wang <elainewy@meta.com>
Basically port of the logic from
CompressedTensorsW8A8Fp8MoECutlassMethod
and utilize the new fused_moe support from #16366. This should enable Llama-4 FP8 on AMD, so asking @tjtanaa to test MI300X.Manually tested by disabling the CUTLASS pathway on H100:
For reference here is the CUTLASS result: